%Intro

Limitations in the performance and energy efficiency of traditional CMOS transistors at sub-threshold voltages have led to explorations of a wide gamut of device and architectural techniques.
Several techniques, such as vertical FinFETs at the device-level and near- or sub-threshold computing at the architectural level, have so far enabled energy efficiency enhancements. 
However, the inherent physical limitations of the charge transport mechanism in MOS transistors have forced a rethink of several aspects of processor design, ranging from the device to the system level. We examine adopting a special class of devices, with steep sub-threshold slope, to achieve these designs.

In this paper, we attempt to stretch the boundaries of computing further into domains that are currently unreachable or difficult to achieve, ranging from ultra-low power sensor nodes with RF energy harvesting capabilities to high performance server architectures that are designed with high yield and thermal resilience.

The subsequent sections of the paper are as follows. Section~\ref{sec:modeling} describes the device-to-architecture abstraction model that we employ. Section~\ref{sec:challenges} illustrates some of the challenges faced during the adoption of these new computing paradigms, while Section~\ref{sec:new-design-spaces} proposes means to overcome these challenges and demonstrates the benefits of using these steep-slope transistor-based designs. Finally, we conclude with~Section~\ref{sec:conclusion}.


\begin{comment}
\begin{itemize}
\item Limitations of existing CMOS based approaches / Benefits of stretching the boundaries of computing into currently unreachable/difficult spaces - Wearable implants, ultra low power sensor nodes as well as High Performance Computing (HPC).
\item (sub bullet) Ultra Low Power Domain: Need for energy harvesting
\item (sub bullet)HPC: Multicore scaling increasing number of cores per chip.- A 2D manycore chip will be constrained by yield.  
\item (paragraph split here) Types of Steep Slope Devices.
\item Challenges encountered.
\item (discuss why HTFETs, of the above types) Impact of tunnel-FETs on traditional computing - Low power processors, domain specific accelerators.
\item (re-iterate sub bullets from previous paragraph as actual examples in paper)
%3D stacking can be a viable option, but then an additional thermal constraint is introduced.
\end{itemize}
\end{comment}

